VirtuosoNext

Altreonic has now released a new version of the VirtuosoNext Designer (and RTOS) for Windows. This is a 64bit version and replaces the older OpenComRTOS Win32 version that is no longer fully functional on older Windows platforms. Together with a fully updated API manual, it can be downloaded and installed from the msi file on a Windows PC. Visit the download section.

Contact us for the external toolchain, available from our ftp server

The older OpenComRTOS hereby is deprecated and should no longer be used.

Separation of concerns for resilient embedded real-time

Abstract:

Many embedded applications, specifically safety-critical ones, have strict real-time constraints. In the very worst case, missing a deadline can be catastrophic. Therefore, many approaches have been developed and successfully deployed whereby time is explicitly used to schedule the application tasks. A very important design paramater is a guaranteed Worst Case Execution Time (WCET). While this approach can be justified partly for historical reasons but also for reasons of simplicity, modern many-core processors pose a significant challenge as the chips combine multiple tightly coupled processing cores, fast caches to alleviate slow memory and complex peripherals. All these elements result in a statistical execution behaviour whereby a measure like WCET is no longer practical. In this paper we advocate that this situation requires a different approach to programming, i.e. one based on events and concurrency with time no longer being a strict design parameter but rather a consequence of the program execution. It is a consequence of applying a separation of concerns to execution in space and time. Benchmarks obtained with the latest version of VirtuosoNext Designer, a fine-grain partitioning multi-core RTOS, illustrate that this is not only feasible but also with no compromise on the real-time behavior. In the latest implementation this was extended to real-time fault recovery making systems much more resilient than with the traditional approach.

In this short paper, we explain how e-mobility and the drive towards autonomous driving and MaaS is being disruptive for the traditional automotive vehicle makers. We show how’s KURT’s Software Driven approach meets the challenges.

VirtuosoNext for emobility

PRESS RELEASE

Pressemitteilung • Communiqué de Presse • Comunicato Stampa

Altreonic successfully delivers on the EuroCPS NoFist project 

(Novel Fine Grain Space and Time Partitioning for a Mixed Criticality Platform)

In the project, supervised by Thales TRT, Altreonic ported and further developed VirtuosoNext Designer, providing as an industry’s first fine-grain space and time portioning. The latter enables non-stop hard real-time processing by recovering from runtime faults in microseconds on the selected Freescale T2080 platform.

Leslie Lamport, the man behind TLA+/TLC, the formal modeling language we used to develop our RTOS kernel has started a series of video lectures on TLA+. If interested in a comprehensive and pragmatic approach to formal modelling, we can only recommend it.

The webpage with a discussion forum is here with the videos here. 

Altreonic has been demonstrating VirtuosoNext at the Hannover Messe, 24-28 April on the EUROCPS booth with Thales TRT. Visit us Hall 3, Booth E02 (European Comission). Altreonic's team has been meeting many interested visitors at the Hannover Messe April 24-28. Highlights were the novel City-KURT concept as well as VirtuosoNext.

The fine grain memory protection in combination with microsecond real-time performance and a small code size is a breakthrough for VirtuosoNext Designer. In combination with the static programming model that eliminates many known safety and security risks, it delivers unprecedented real-time performance in combination with fine-grain partitioning for safety and security critical applications. 

Altreonic has now ported VirtuosoNext™ Designer to the Freescale QorIQ T2080/1 processor. The chip has 8 floating point cores implemented as 4 CPUs with a dual register set running at 1.8 GHz. The latest port of VirtuosoNext Designer delivers unprecedented hard real-time capability in the microsecond range in combination with fine grain task level space and time partitioning for embedded safety-critical applications. 

In contrast to traditional hypervisor based partitioning schemes, VirtuosoNext™ protects each application task separately in memory with a real-time response still available in the microseconds range as one expect from using an RTOS.  Moreover, the code size is measured in Kbytes, allowing optimal use of the on-chip caches for best performance.

VirtuosoNext Designer can be considered a 5th generation of the Virtuoso RTOS, whose origins go back to 1991. It was the first RTOS that was completely distributed and mainly used for parallel DSP applications, often in the demanding aero-space-defense domain. Some target systems had 12000 processors, the most prominent one was ESA's Rosetta spacecraft.

Eric Verhulst will be speaking at the Spring Computer Systems Week in Porto, presenting at a thematic session on Program transformation and analysis approaches for future computing systems (ProTrans). Title of the presentation: "From CSP to Interacting Entities for programming and modelling". Details can be found here.