Altreonic partner in Design for Reliability project

Altreonic has joined the COMPACT project together with regional research and industrial partners to improve the engineering process to take into account the reliability challenges of modern, advanced electronics as used in embedded systems.

Shrinking silicon features provide a much higher density but also increases the complexity of the electronics while reducing the potential life-time of the chips. In addition, packaging and the printed circuit boards must remain reliable over the entire life-time of the system which is increasingly challenging due to higher speed interconnects. As industrial products become more sophisticated, the manner in which we design, qualify, produce and maintain them must become more sophisticated. Design for Reliability should not only be seen as a different approach to design, qualification and maintenance.  It should also change how we think about the way design, qualification and maintenance should be performed. 

The objective of the project is to develop a Physics-of-Failure based Design-for-Reliability and Qualification methodology integrated in the overall product development process that enables the user to fundamentally improve the reliability of his products, reduce development costs without increasing the product cost. The methodology will combine existing best practices and integrate those in the product development process of different application domains. Altreonic will use its e-vehicle as a test case and integrate the resulting experience as guideline in the GoedelWorks process flow.